PIC18F65J11-I/PT【PDF 48/332 页】IC PIC MCU FLASH 16KX16 64TQFP

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Sheet目录3879

44页 45页 46页 47页 [48页]49页 50页 51页 52页

2010 Microchip Technology Inc.

DS39774D-page 141

PIC18F85J11 FAMILY

TABLE 11-11: PORTE FUNCTIONS

Pin Name

Function

TRIS

Setting

I/O

Type

Description

RE0/RD/AD8

RE0

DIG

LATE<0> data output.

PORTE<0> data input.

TTL

Parallel Slave Port read enable control input.

AD8(1)

DIG

External memory interface, address/data bit 8 output.(2)

TTL

External memory interface, data bit 8 input.(2)

RE1/WR/AD9

RE1

DIG

LATE<1> data output.

PORTE<1> data input.

TTL

Parallel Slave Port write enable control input.

AD9(1)

DIG

External memory interface, address/data bit 9 output.(2)

TTL

External memory interface, data bit 9 input.(2)

RE2/AD10/CS

RE2

DIG

LATE<2> data output.

PORTE<2> data input.

AD10(1)

DIG

External memory interface, address/data bit 10 output.(2)

TTL

External memory interface, data bit 10 input.(2)

TTL

Parallel Slave Port chip select control input.

RE3/AD11

RE3

DIG

LATE<3> data output.

PORTE<3> data input.

AD11(1)

DIG

External memory interface, address/data bit 11 output.(2)

TTL

External memory interface, data bit 11 input.(2)

RE4/AD12

RE4

DIG

LATE<4> data output.

PORTE<4> data input.

AD12(1)

DIG

External memory interface, address/data bit 12 output.(2)

TTL

External memory interface, data bit 12 input.(2)

RE5/AD13

RE5

DIG

LATE<5> data output.

PORTE<5> data input.

AD13(1)

DIG

External memory interface, address/data bit 13 output.(2)

TTL

External memory interface, data bit 13 input.(2)

RE6/AD14

RE6

DIG

LATE<6> data output.

PORTE<6> data input.

AD14(1)

DIG

External memory interface, address/data bit 14 output.(2)

TTL

External memory interface, data bit 14 input.(2)

RE7/AD15/

CCP2

RE7

DIG

LATE<7> data output.

PORTE<7> data input.

AD15(1)

DIG

External memory interface, address/data bit 15 output.(2)

TTL

External memory interface, data bit 15 input.(2)

CCP2(3)

DIG

CCP2 compare output and CCP2 PWM output; takes priority over

port data.

CCP2 capture input.

Legend:

O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input, x = Don’t care (TRIS bit

does not affect port direction or is overridden for this option).

Note 1:

Available on 80-pin devices only.

External memory interface I/O takes priority over all other digital and PSP I/O.

Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared (all devices in Microcontroller mode).

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